1. Field of the Invention:
The present invention relates to a solid-state charge-coupled-device (CCD) imager, and more particularly to a horizontal charge transfer system for use in such a solid-state CCD imager.
2. Description of the Prior Art:
One known solid-state imager, for example, a solid-state CCD imager of the interline charge transfer type, is shown in FIG. 1 of the accompanying drawings. In FIG. 1, the solid-state CCD imager includes an imaging region 3 that comprises a matrix of vertically and horizontally arrayed photosensitive areas 1 for storing signal charges depending on the intensity of applied light, and a plurality of vertical shift registers (vertical charge transfer areas) 2 for vertically transferring the signal charges shifted from the photosensitive areas 1. The signal charges, corresponding to all pixels in the imaging region 3, which have been photoelectrically converted by the photosensitive areas 1, are instantaneously shifted into the vertical shift registers 2 during a fraction of a vertical blanking period. The signal charges that have been shifted into the vertical shift registers 2 are then shifted, one scanning line at a time, into a horizontal shift register (horizontal charge transfer area) 4 during a fraction of a horizontal blanking period. One scanning line of signal charges thus shifted is then horizontally transferred by the horizontal shift register 4. The horizontal shift register 4 has a terminal connected to an output circuit 5 that may comprise an FDA (Floating Diffusion Amplifier) or the like. The output circuit 5 converts the transferred signal charges into a voltage, and outputs the converted voltage.
The horizontal shift register 4 is schematically shown in FIG. 2 of the accompanying drawings. As shown in FIG. 2, the horizontal shift register 4 comprises a plurality of charge transfer electrodes spaced at equal intervals or pitches p in the horizontal direction and extending perpendicularly to the horizontal direction. Each of the charge transfer electrodes has a double-layer structure comprising a charge storage gate electrode 6 composed of a second layer of polysilicon 2Poly and a charge transfer gate electrode 7 composed of a third layer of polysilicon 3Poly. The interval or pitch p corresponds to the length of one charge transfer channel of the horizontal shift register 4. A first layer of polysilicon lPoly is indicated by the broken lines in FIG. 2. A signal charge is indicated by a solid circular dot.
There are known solid-state CCD imagers designed with a larger number of pixels for advanced television systems such as a high-definition television (HDTV) system. In such solid-state CD imagers, the charge transfer frequency of the horizontal shift register 4 is two or three times higher than that of the horizontal shift register in a conventional solid-state CCD imager for the NTSC format. With a solid-state CCD imager having two million pixels combined with a one-inch optical system, for example, the horizontal shift register 4 has a charge transfer frequency of 37 MHz, and a relatively large charge transfer channel length of 7.3 .mu.m. The charge transfer frequency of 37 MHz can be converted as a charge transfer time of 13.5 nsec. in theory, but the actual charge transfer time ranges from 8 to 10 nsec. owing to distortions of the transfer clock signal. Theoretically, transferring the charge transfer channel length of 7.3 .mu.m in the charge transfer time ranging from 8 to 10 nsec. is almost at the capability limitations of the device. As a result, the charge transfer efficiency of the horizontal shift register 4 is low.